NXP Semiconductors /MIMXRT1011 /DCP /CH3STAT_CLR

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Interpret as CH3STAT_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HASH_MISMATCH)HASH_MISMATCH 0 (ERROR_SETUP)ERROR_SETUP 0 (ERROR_PACKET)ERROR_PACKET 0 (ERROR_SRC)ERROR_SRC 0 (ERROR_DST)ERROR_DST 0 (ERROR_PAGEFAULT)ERROR_PAGEFAULT 0ERROR_CODE0TAG

Description

DCP channel 3 status register

Fields

HASH_MISMATCH

This bit indicates that a hashing check operation is mismatched for the control packets that enable the HASH_CHECK bit

ERROR_SETUP

This bit indicates that the hardware detected an invalid programming configuration (such as a buffer length that is not a multiple of the natural data size for the operation)

ERROR_PACKET

This bit indicates that a bus error occurred when reading the packet or payload or when writing the status back to the packet paylaod

ERROR_SRC

This bit indicates that a bus error occurred when reading from the source buffer

ERROR_DST

This bit indicates that a bus error occurred when storing to the destination buffer

ERROR_PAGEFAULT

This bit indicates that a page fault occurred while converting a virtual address to a physical address

ERROR_CODE

Indicates additional error codes for some of the error conditions.

1 (NEXT_CHAIN_IS_0): Error is signalled because the next pointer is 0x00000000.

2 (NO_CHAIN): Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set.

3 (CONTEXT_ERROR): Error is signalled because an error was reported while reading/writing the context buffer.

4 (PAYLOAD_ERROR): Error is signalled because an error was reported while reading/writing the payload.

5 (INVALID_MODE): Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

TAG

Indicates the tag from the last completed packet in the command structure.

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